Altera Cyclone V Development Kit: Difference between revisions

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** I was trying to understand the mapping between a GPIO pin name in the schematics like HPS_GPIOx the bank it is connected to and the GPIO number: there is actually no link between the bank and the pin number
=== What is the relationship between the GPIO/GPI schematics name and the GPIO number in U-Boot on the SX flavour? ===
** Each FPGA I/O block is divided into banks; In the SX board the banks connected to the HPS are 6A, 6B, 7A, 7B, 7C, 7D.
This board distinguishes between GPIO (General Purpose Input/Output) and and GPI (General Purpose Input).
** HPS_GPIO[0:28] (29)-> portA[0:28]
 
** HPS_GPIO[29:57] (29) -> portB[0:28]
Each SoC/FPGA has parts dedicated to I/O. These I/O interfaces are divided into banks. There is actually no relationship between the bank number and the pin number.
** HPS_GPIO[57:84] (27) -> portC[0:26]
 
** HPS_GPI[0:13]=portC[13:26] (GPI=General Purpose Input) (http://git.arm.linux.org.uk/cgit/linux-arm.git/tree/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts?id=466e90ca2138c92b1e47d919237488b445b44d73#n156 and https://www.altera.com/support/support-resources/knowledge-base/solutions/rd05162013_937.html)
In the SX board the banks connected to the HPS are 6A, 6B, 7A, 7B, 7C, 7D.
** Example on SX
{| class="wikitable"
*** SD_CD_DAT3=HPS_GPIO47=portB[18] (47-29) (http://git.arm.linux.org.uk/cgit/linux-arm.git/tree/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts?id=a7f9dac38c0c500aaaf5335d904c5a48584f0eeb#n127)
!HPS_GPIOx
*** LEDs=HPS_GPIO[41:44]=portB[12:15] (http://git.arm.linux.org.uk/cgit/linux-arm.git/tree/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts?id=a7f9dac38c0c500aaaf5335d904c5a48584f0eeb#n42)
!portX pin
*** PB/SW=HPS_GPI[4:11]=portC[17:24]  
|-
** Additional Resource:
|HPS_GPIO[0:28]
*** http://lists.infradead.org/pipermail/linux-arm-kernel/2016-March/416682.html
|portA[0:28]
|-
|HPS_GPIO[29:57]
|portB[0:28]
|-
|HPS_GPIO[57:84]
|portC[0:26]
|-
|HPS_GPI[0:13]
|portC[13:26]<ref>http://git.arm.linux.org.uk/cgit/linux-arm.git/tree/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts?id=466e90ca2138c92b1e47d919237488b445b44d73#n156</ref><ref>https://www.altera.com/support/support-resources/knowledge-base/solutions/rd05162013_937.html</ref>
|}
For example:
{| class="wikitable"
!Schematics Name
!HPS_GPIOx
!portX pin
|-
|SD_CD_DAT3
|HPS_GPIO47
|portB[18]<ref>http://git.arm.linux.org.uk/cgit/linux-arm.git/tree/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts?id=a7f9dac38c0c500aaaf5335d904c5a48584f0eeb#n127</ref>
|-
|USER_LED_HPS[3:0]
|HPS_GPIO[41:44]
|portB[12:15]<ref>http://git.arm.linux.org.uk/cgit/linux-arm.git/tree/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts?id=a7f9dac38c0c500aaaf5335d904c5a48584f0eeb#n42</ref>
|-
|USER_PB_HPS[3:0]:USER_DIPSW_HPS[3:0]
|HPS_GPI[4:11]
|portC[17:24]
|}
 
== Resources ==
{| class="wikitable"
!
!
|-
|[PATCH 2/2] ARM: socfpga: Add support for HPS KEYs/SWs on SoCKit
|http://lists.infradead.org/pipermail/linux-arm-kernel/2016-March/416682.html
|}
 
== References ==

Latest revision as of 02:13, 27 March 2017

What is the relationship between the GPIO/GPI schematics name and the GPIO number in U-Boot on the SX flavour?

This board distinguishes between GPIO (General Purpose Input/Output) and and GPI (General Purpose Input).

Each SoC/FPGA has parts dedicated to I/O. These I/O interfaces are divided into banks. There is actually no relationship between the bank number and the pin number.

In the SX board the banks connected to the HPS are 6A, 6B, 7A, 7B, 7C, 7D.

HPS_GPIOx portX pin
HPS_GPIO[0:28] portA[0:28]
HPS_GPIO[29:57] portB[0:28]
HPS_GPIO[57:84] portC[0:26]
HPS_GPI[0:13] portC[13:26][1][2]

For example:

Schematics Name HPS_GPIOx portX pin
SD_CD_DAT3 HPS_GPIO47 portB[18][3]
USER_LED_HPS[3:0] HPS_GPIO[41:44] portB[12:15][4]
USER_PB_HPS[3:0]:USER_DIPSW_HPS[3:0] HPS_GPI[4:11] portC[17:24]

Resources

[PATCH 2/2] ARM: socfpga: Add support for HPS KEYs/SWs on SoCKit http://lists.infradead.org/pipermail/linux-arm-kernel/2016-March/416682.html

References

  1. ↑ http://git.arm.linux.org.uk/cgit/linux-arm.git/tree/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts?id=466e90ca2138c92b1e47d919237488b445b44d73#n156
  2. ↑ https://www.altera.com/support/support-resources/knowledge-base/solutions/rd05162013_937.html
  3. ↑ http://git.arm.linux.org.uk/cgit/linux-arm.git/tree/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts?id=a7f9dac38c0c500aaaf5335d904c5a48584f0eeb#n127
  4. ↑ http://git.arm.linux.org.uk/cgit/linux-arm.git/tree/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts?id=a7f9dac38c0c500aaaf5335d904c5a48584f0eeb#n42
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