I2C: Difference between revisions
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RW=1 | RW=1 | ||
Start: A high-to-low transition of SDA with SCL high | |||
Stop: A low-to-high transition of SDA with SCL high | |||
Acknowledge (ACK): On the ninth clock cycle after every address or data byte is transferred, the receiver | |||
will pull the SDA pin low to acknowledge proper reception of the byte. | |||
Not Acknowledge (NOT ACK): Alternatively, on the ninth clock cycle after every address or data byte is | |||
transferred, the receiver can leave the SDA pin high to indicate that there was a problem with the reception | |||
of the byte or that this byte completes the group transfer. | |||
== Resources == | == Resources == | ||
Revision as of 21:42, 2 June 2017
I2C address slave 7-bit
addr << 1 | RW
RW=1
Start: A high-to-low transition of SDA with SCL high
Stop: A low-to-high transition of SDA with SCL high
Acknowledge (ACK): On the ninth clock cycle after every address or data byte is transferred, the receiver
will pull the SDA pin low to acknowledge proper reception of the byte.
Not Acknowledge (NOT ACK): Alternatively, on the ninth clock cycle after every address or data byte is
transferred, the receiver can leave the SDA pin high to indicate that there was a problem with the reception
of the byte or that this byte completes the group transfer.
Resources
| I2C specification | http://www.nxp.com/documents/user_manual/UM10204.pdf |
| SCCB specification | http://www.ovt.com/download_document.php?type=document&DID=63 |