U-Boot: Difference between revisions
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Created page with "U-Boot is a bootloader. == Communicate with the sst26vf032b ==" |
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== Communicate with the | == Communicate with the SST26VF032B == | ||
{| class="wikitable" | |||
!Instruction | |||
! | |||
!Command cycle | |||
!Bitlen | |||
!Source | |||
!Example | |||
|- | |||
|JEDEC-ID | |||
| | |||
|9FH | |||
|32 | |||
| | |||
|U-Boot > sspi 0x7100 32 9f000000 | |||
00BF2642 | |||
|- | |||
|RDSR | |||
| | |||
|05H | |||
|16 | |||
|p. 10 | |||
|U-Boot > sspi 0x7100 16 3500 | |||
0008 | |||
|- | |||
|RDCR | |||
| | |||
|35H | |||
|16 | |||
| | |||
| | |||
|- | |||
|WREN | |||
| | |||
|06H | |||
|8 | |||
|p. 33 | |||
|U-Boot > sspi 0x7100 8 06 | |||
00 | |||
|- | |||
|WBPR | |||
| | |||
|42H | |||
|152 | |||
| | |||
| | |||
|- | |||
|RBPR | |||
| | |||
|72H | |||
|152 | |||
| | |||
| | |||
|- | |||
|ULBPR | |||
| | |||
|98H | |||
|8 | |||
| | |||
| | |||
|- | |||
|Read (40MHz) | |||
| | |||
|03H | |||
| | |||
|p. 15 | |||
|Read at offset 0 32 bits | |||
U-Boot > sspi 0x7100 64 0300000000000000 | |||
00000000FFFFFFFF | |||
|- | |||
|SE | |||
|Sector-Erase (change to 1) a 4KiB sector | |||
|20H | |||
|32 | |||
| | |||
| | |||
|} | |||
Revision as of 16:40, 19 May 2016
U-Boot is a bootloader.
Communicate with the SST26VF032B
| Instruction | Command cycle | Bitlen | Source | Example | |
|---|---|---|---|---|---|
| JEDEC-ID | 9FH | 32 | U-Boot > sspi 0x7100 32 9f000000
00BF2642 | ||
| RDSR | 05H | 16 | p. 10 | U-Boot > sspi 0x7100 16 3500
0008 | |
| RDCR | 35H | 16 | |||
| WREN | 06H | 8 | p. 33 | U-Boot > sspi 0x7100 8 06
00 | |
| WBPR | 42H | 152 | |||
| RBPR | 72H | 152 | |||
| ULBPR | 98H | 8 | |||
| Read (40MHz) | 03H | p. 15 | Read at offset 0 32 bits
U-Boot > sspi 0x7100 64 0300000000000000 00000000FFFFFFFF | ||
| SE | Sector-Erase (change to 1) a 4KiB sector | 20H | 32 |