Altera Cyclone V Development Kit
What is the relationship between the GPIO/GPI name on the schematics and the GPIO number in U-Boot/Linux
Example on SX
I was trying to understand the mapping between a GPIO pin name in the schematics like HPS_GPIOx the bank it is connected to and the GPIO number: there is actually no link between the bank and the pin number
Each FPGA I/O block is divided into banks; In the SX board the banks connected to the HPS are 6A, 6B, 7A, 7B, 7C, 7D.
HPS_GPIO[0:28] (29)-> portA[0:28]
HPS_GPIO[29:57] (29) -> portB[0:28]
HPS_GPIO[57:84] (27) -> portC[0:26]
HPS_GPI[0:13]=portC[13:26] (GPI=General Purpose Input) ([1] [2])
Resources
| [PATCH 2/2] ARM: socfpga: Add support for HPS KEYs/SWs on SoCKit | http://lists.infradead.org/pipermail/linux-arm-kernel/2016-March/416682.html |
- ↑ http://git.arm.linux.org.uk/cgit/linux-arm.git/tree/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts?id=466e90ca2138c92b1e47d919237488b445b44d73#n156
- ↑ https://www.altera.com/support/support-resources/knowledge-base/solutions/rd05162013_937.html
- ↑ http://git.arm.linux.org.uk/cgit/linux-arm.git/tree/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts?id=a7f9dac38c0c500aaaf5335d904c5a48584f0eeb#n127
- ↑ http://git.arm.linux.org.uk/cgit/linux-arm.git/tree/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts?id=a7f9dac38c0c500aaaf5335d904c5a48584f0eeb#n42