I2C

The I2C slave address is coded on 7-bit and is shifted to the left for 1 bit to code the read-write (RW) bit.

Operation	RW
Write	0
Read	1

addr << 1 | RW

Start: A high-to-low transition of SDA with SCL high

Stop: A low-to-high transition of SDA with SCL high

Acknowledge (ACK): On the ninth clock cycle after every address or data byte is transferred, the receiver will pull the SDA pin low to acknowledge proper reception of the byte.

Not Acknowledge (NOT ACK): Alternatively, on the ninth clock cycle after every address or data byte is transferred, the receiver can leave the SDA pin high to indicate that there was a problem with the reception of the byte or that this byte completes the group transfer.

Resources

I2C specification	http://www.nxp.com/documents/user_manual/UM10204.pdf
SCCB specification	http://www.ovt.com/download_document.php?type=document&DID=63